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Stable release: | 1.2 unreleased - based on SDRAM 1.1 of April 2010 |
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Status: | Initial updates to current tools, pending testing. |
Maintainer: | Russ Ferriday |
Description: | A Burst Mode access driver for the Micron Technology MT48LC16M16A2 Synchronous DRAM |
- One thread reads/writes data to SDRAM
- Optimised for burst access of blocks of 32 bit words (not for random access)
- Application retains control of refresh by calling sdram_refresh at appropriate to prevent unexpected delays
- 16-bit - Peak write: 50MB/s, read 50MB/s. Single word write (3 threads): 3120ns, read 3520ns.
- 4-bit - Peak write: 12.5MB/s, read 12.5MB/s. Single word write (4 threads): approx 2.5us, approx 3us.
- Code size: 2KB
- Thread count: 1
- module_sdram_burst: the burst mode driver
- app_sdram_burst_example: contains a c client and an xc test harness
Issues may be submitted via the Issues tab in this github repo. Response to any issues submitted are at the discretion of the maintainer of this component.