This section contains internal documentation - that is the bits that make up the ethercat controller.
Structure containing all the ports of an MII PHY.
Structure Members:
RX Clock Block.
TX Clock Block.
MII RX clock wire.
MII RX data wire.
MII RX data valid wire.
MII TX clock wire.
MII TX data wire.
MII TX enable wire.
Function that initialises the ports and clockblocks that control the PHY.
This needs to be called once for each PHY.
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Function that receives data on the master port.
Only frames arriving on this port are interpreted. This function reads byte from the input port (guarded by the datavalid port), and outputs them on the channel. The data stream is opened with control token 3 (indicating that a valid CRC will eb transmitted at the end of the stream) and terminated with two control tokens. One control token to signal the CRC status (15: CRC error, 0: CRC good), and an END token.
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Function that transmits data on an mii port.
This function reads bytes from an input channel, and outputs them one byte at a time. Data should arrive fast enough to prevent a gap in the packet.
The first token is a control token: a zero control token indicates that the transmitter should append a CRC; a non-zero control token indicates that a valid CRC is included at the end of the message. After the initial control token, a stream of data bytes are expected on the channel, terminated by a control token. The terminating token is either 0 or 0xF depending on whether the CRC on the incoming packet was valid or not. If the TX function was asked to add a valid CRC, and the incoming CRC was deemed invalid, then it will knacker the outgoing CRC too. Just to be consistent. Finally a ‘1’ control token is read closing the stream.
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Function that processes all frames.
Frames are streamed in over fromRx and streamed out over toTx. The data streams are opened with control token 3 and terminated with two control tokens. One control token to signal the CRC status (15: CRC error, 0: CRC good), and an END token.
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